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Intrinsic Memory Function of Carbon Nanotube-based Ferroelectric Field-Effect Transistor

Wangyang Fu, Zhi Xu, Xuedong Bai,* Changzhi Gu, and Enge Wang*

Nano Lett., Article ASAP
DOI: 10.1021/nl801656w
Publication Date (Web): February 10, 2009

We demonstrate the intrinsic memory function of ferroelectric field-effect transistors (FeFETs) based on an integration of individual singlewalled carbon nanotubes (SWCNTs) and epitaxial ferroelectric films. In contrast to the previously reported “charge-storage” CNT-FET memories, whose operations are haunted by a lack of control over the “charge traps”, the present CNT-FeFETs exhibit a well-defined memory hysteresis loop induced by the reversible remnant polarization of the ferroelectric films. Large memory windows ∼4 V, data retention time up to 1 week, and ultralow power consumption (energy per bit) of ∼femto-joule, are highlighted in this report. Further simulations and experimental results show that the memory device is valid under operation voltage less than 1 V due to an electric-field enhancement effect induced by the
ultrathin SWCNTs.





Figure 1. (a) Schematic sketch of the fabricated CNT-FeFET.(b)Structural characterization of BaTiO3 thin films deposited on STON substrates by TEM, indicating the coherent epitaxial growth of BaTiO3 thin film with respect to STON substrate. (c) Typical ID-VG transfer characteristics of the CNT-FeFET made of SWCNT with 600 nm in length. The arrows indicate a clockwise hysteresis loop.



Figure 2. Intrinsic memory function of CNT-FeFETs. (a) Retentive write/erase operation, showing the controllable, nonvolatile memory switching of the CNT-FeFETs. The on- and an off-state drain currents of ∼40 and ∼0.02 nA can be switched with a write and an erase gate voltage pulses of -6 and +6 V in a controllable manner, respectively. The measured on/off ratio were kept on ∼103 as the write/erase operations repeating. In right part of the figure, the retention test shows that both the on- and off-state of the memory can be well retained within a period of up to 1 week, after which the on/off ratio is still >102. (b) Test of nondestructively reading-out for more than two hundreds of times. The on/off ratio is keep on ∼102 and well separated from the drain current of the memory device before poling, which is defined as the reference current here.

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